1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method of forming a fine metal pattern and a method of forming a metal line using the same.
2. Description of the Related Art
FIG. 1 is a cross-sectional view illustrating a related art method of forming a metal line in a semiconductor device.
Referring to FIG. 1, to begin with, a first interlayer insulating layer 20 is deposited on a substrate 10, and the first interlayer insulating layer 20 is patterned and etched to form a via hole (not shown).
Thereafter, tungsten is filled into the via hole so as to form a via plug 30.
Afterwards, a metal layer (not shown) is deposited on the first interlayer insulating layer 20 as well as the via plug 30. Thereafter, a photoresist layer (not shown) is deposited on the metal layer, and it is patterned into a predetermined configuration.
Subsequently, the metal layer is etched using the patterned photoresist layer as an etch mask to thereby form a metal line 70.
After forming the metal line 70, a second interlayer insulating layer 60 is deposited on the metal line 70 as well as the first interlayer insulating layer 20, and it is planarized so as to complete a semiconductor device having the metal line 70 therein.
Meanwhile, as the semiconductor device is highly integrated and micronized recently, the critical dimension (CD) of the metal line is reduced proportionally. In particular, the performance of the semiconductor device depends on whether or not the critical dimension of the metal line in nano-scale feature may be implemented in high technology semiconductors.
However, a variable to determine the critical dimension of the metal line in the related art mainly depends on the performance of a photolithographic apparatus.
Therefore, there is such a serious problem in the related art that the critical dimension of the metal line only depends on the performance of the photolithographic apparatus utterly.
In addition, if the second interlayer insulating layer is deposited after forming the metal line according to the related art, there is another drawback that there occurs a void in the second interlayer insulating layer.